FAST CARS, FAST CIRCUITS, FAST POTATOS

A semester and half of the summer flew right by! A few updates:

Tufts Hybrid Racing won the electric category!
Net sleep defecit ~50 hours

As electrical lead, I couldn't be happier. Moreover, the experience of going to comp and tech was invaluable.

A few lessons:
  1. Strain relief is a thing.

    To put it frankly, most of the car's wiring is atrocious. Done with crimp terminals and wire that was often too small, things had a habit of jiggling out of place. The result would be things like relays not turning on, and safety circuits triggering prematurely.
  2. While doing hardcore stuff is awesome, it doesn't get you past tech.

    I think this is more than evident in this year's very low tech pass rates. I saw cars at comp with custom BMS solutions, hub motors (drools at IIT), integrated dash displays, CAN networks, and a whole host of innovations that I would die to have the time to implement. In the end, we didn't go that route. I'm glad that at a point very early on in the fall semester, I decided to pass on stroking my ego. Case in point: I originally planned on implementing the accumulator indicators with some fancy DC-DC bricks, however, they decided to die at comp. Not wanting to waste any more time,  an LED + resistor solution was whipped up.
  3. Documentation will save us (all)

    One thing I was very glad about was the fact that Alyssa and I had spent so much time beforehand churning out documentation by the pageload. If anything, having proper schematics and system diagrams made the inspectors more likely to cooperate and made the inspection process much simpler. Further, LOOKING AT THE TECH INSPECTION CHECKLIST BEFOREHAND will prepare you more than anything.
     
  4. Batteries are a pain in the ass.

    The saga began with the addition of the pouch cell rules for 2014. The rules required a host of safety feature required of li-ion pouch cell based accumulators. Namely:
      1. compression limiters
      2. padding between cells
      3. a repeating frame design 
      4. complete modularity of the cells.
          And so, about a week into the spring semester, bricks were shat and the hunt for cylindrical                 cells began. We ended up settling on the 40152 15Ah headway cells as they allowed a few                   things: 
      1. No pouch cell rules
      2. Similar pack configuration and capacity (80S1P vs. 71S1P of the previous pack)
      3. "Implementable" packaging.
          I say implementable in that we were limited by our fabrication capabilities. In the end, we had to reuse our old sidepods and jam in all of the old electronics with some new electronics and bigger cells, which resulted in a very contrived game of Tetris. I think there was about 5mm of clearance between the cell stacks and the sides of the box after putting in the FR4. Further, had it not been for the grace of UVM, the acres of Kapton tape required to insulated everything from each other inside the pack would not have existed. <3 UVM AERO <3.  

With that said, we will probably have to redo the batteries yet again for Lincoln next year lol.

Other Observations:

Car was extremely slow. The controller was throwing errors at us left and right as we put the hammer down; in my sleep deprived state, I wasn't sure if it was because of a fried/improperly installed HVD causing excessive contact resistance or the Sevcon was throwing a fit because of some ongoing throttle parameter issues. Regardless, further debugging once we move into our new shop space will definitely happen.
In other news:

I've been working with a Tufts Lab over the summer doing some work for Zildjian. In the process, there's been a necessity to interface some good ol' analog with an fpga.

Of course, this meant laying out and implementing a front-end.

Squiggles of Science
The board is meant to interface with the Atlys Spartan6 based dev board from Xilinx. The slightly totally unnecessary meanders were trace matched to 5 mil and layer thicknesses were calculated to achieve proper 50-ohm characteristic impedances for the topside traces (not that it mattered either lol) with a ground plane extended to the 2nd layer (yellow) for the topside digital traces. I ended up using a THS1007 as the A to D, which has a pin compatible sister, the THS1209, which can do up to 8MSPS if need be.

It wasn't known until much later into the project that the desired frequency regime was actually much lower than what I had designed for. I guess this is what I get for doing what the PI asked.


Erp-amps


The analog side was pretty simple - just a few buffer amps, gains stages, an AA filter, and the level shifter required to interface with the A to D. J-fet amps were chosen for their high input impedance and excellent high frequency performance.


IRL
Stylish red wire was used to air-wire the +5V line to the buffer amps since a short developed between the trace and ground. After reviewing the Gerbers, I'm still pretty puzzled how something like this could've happened. MyroPCB, pls!?

Given that the trace was buried under the top layer, the impromptu solution was to beast it with a power supply until the trace burned out and cut a few traces. Burn, baby, burn.

Fast potatos to be discussed later...



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